Difference between revisions of "CODA Summary"

From Ciswikidb
Jump to navigation Jump to search
Line 39: Line 39:
 
== INT FADC ==
 
== INT FADC ==
  
 +
const FADC_ADDR      = 0xed0000          # 12 bit fadc
 +
const MAX_FADC_DATA  = 40000
  
 +
const FADC_DAC        = 3300   
 +
const FADC_THRESHOLD  = 1             
 +
const FADCMODE = 3
 +
const FADCSLOT_PEPPo3  = 10
 +
const FADCSLOT_Mott    = 7
 +
const FADCPL          = 0
 +
const FADCPTW          = 0
 +
 +
const TIR_ADDR        = 0x0ed0            # Address of TI
 +
const TRSPLIT        = 0xea13            # Address of FADC Signal Distribution Module
  
 
== TDC ==
 
== TDC ==

Revision as of 10:06, 30 October 2013

Summary of CODA Configurations

Name Readout Output Trigger
Scalers Scaler S1 (helicity gated), S2 (un-gated) Scalers_%d.dat Delayed nT_Settle
Mott_Sample Mott FADC, S1, S2, TDC Mott_Sample_%d.dat Mott Detector
Mott_SemiInt Mott FADC, S1, S2, TDC Mott_SemiInt_%d.dat Mott Detector
FADC_Int INT FADC, S1, S2 FADC_Int_%d.dat nT_Settle


Mott FADC

 const FADC_ADDR       = 0x680000  # 12 bit fADC MOTT - Slot 7
 const FADCSLOT_Mott   = 7
 const TRSPLIT         = 0xeb13   # Address of FADC Signal Distribution Module

INT FADC

const FADC_ADDR = 0xed0000 # 12 bit fadc const MAX_FADC_DATA = 40000

const FADC_DAC = 3300 const FADC_THRESHOLD = 1 const FADCMODE = 3 const FADCSLOT_PEPPo3 = 10 const FADCSLOT_Mott = 7 const FADCPL = 0 const FADCPTW = 0

const TIR_ADDR = 0x0ed0 # Address of TI const TRSPLIT = 0xea13 # Address of FADC Signal Distribution Module

TDC

 TDC caen v775
 const int V775_ADD    = 0x1190

S1

S2

TID

 A24 Address for TID Module (0x100000 for VME Slot 2)
 const TRIG_ADDR=0x100000