Difference between revisions of "UITF Mott CODA Summary"

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Line 1: Line 1:
 
=='''OPS Network'''==
 
=='''OPS Network'''==
Mott DAQ Host:
+
Mott DAQ Host (Rack ITF 07, UITF Roof):
 
           name      =>  itfmdaq0  
 
           name      =>  itfmdaq0  
 
           ip        =>  129.57.229.190
 
           ip        =>  129.57.229.190
Line 15: Line 15:
 
XVR-16 Abaco Intel/Linux VME SBC
 
XVR-16 Abaco Intel/Linux VME SBC
  
/home/idaq/linuxvme (contains an up to date version of the JLab module software drivers)
+
Up to date version of JLab Module drivers
/home/idaq/rol (CODA readout lists for Mott)
+
/home/idaq/linuxvme
 +
CODA Readout lists
 +
/home/idaq/rol
 +
Configuration Files
 +
/home/idaq/cfg
  
Non-DAQ group software drivers were also ported to Linux to minimize software changes to be done on the analysis and monitoring side. These include:
+
All UITF Mott CODA configurations:
* scalers (SIS3801, SIS3801.no_ring, intlib, scaser)
 
* v775
 
* v895
 
* helicity
 
 
 
To support the scaler library framework, a new library was written to facilitate the movement of data between different processes (scaler server, scaler producer, CODA ROC): crateSharedMem
 
 
 
All of these new libraries are located (and used) in:
 
/opt/coda/sbcmdaq0/linuxvme/
 
 
 
The Scaler server and sisProducer are launched after boot via boot scripts in (sbcmdaq0)
 
/home/idaq/boot_scripts/
 
via entries in
 
/etc/inittab
 
 
 
CODA Readout Lists used in the 6100 were updated into the newer "C" readout list framework. No more using makelist or writing .crl files.
 
 
 
Scaler libraries were then optimized to support DMA.
 
 
 
All Mott CODA configurations are now ready to go:
 
 
# Mott_Sample
 
# Mott_Sample
# Mott_SemiInt
+
# Mott_Int
# PEPPo_Int
 
# Scalers
 
  
 
The source is available here:
 
The source is available here:
/opt/coda/sbcmdaq0/rol
+
  itfsbcmdaq0:/home/idaq/rol/
  
To compile, must be on sbcmdaq0. Use the Makefile.
+
To compile, must be on itfsbcmdaq0. Use the Makefile:
 +
  make
 +
or specifically
 +
  make uitf_list.so
  
To access the Mott DAQ VME SBC:  
+
To access the UITF Mott DAQ VME SBC:  
  
   idaq@opsmdaq0 > ssh sbcmdaq0
+
   idaq@itfmdaq0 > ssh itfsbcmdaq0
  
 +
=='''CODA Files'''==
  
 +
CODA readout lists:
 +
idaq@itfsbcmdaq0:/home/idaq/rol/
 +
uitf_list.c
  
=='''CODA Files'''==
+
To compile:
 
+
  make uitf_list.so
CODA crl files are in: idaq@opsmdaq0: /opt/idaq/crl
+
 
Scalers.crl
+
Log entry scripts
Mott_Sample.crl
+
  /opt/idaq/coda/logentry_scripts
Mott_SemiInt.crl
 
PEPPo_Int.crl
 
To compile: makelist Mott_Sample.crl ppc
 
  
CODA scripts files are in: idaq@opsmdaq0: /opt/idaq/scripts
+
CODA 3.10_devel
 +
  /opt/idaq/coda/3.10_devel
  
 +
CODA COOL_HOME
 +
  /opt/idaq/coda/cool.itfmdaq0
  
 +
CODA_SCRIPTS (for startCoda, kcoda, etc)
 +
  /opt/idaq/coda/coda_scripts
  
 
=='''Summary of CODA Configurations'''==
 
=='''Summary of CODA Configurations'''==
Line 76: Line 67:
 
| '''Output'''
 
| '''Output'''
 
| '''Trigger'''
 
| '''Trigger'''
|-
 
| '''Scalers'''
 
| Scaler S1 (helicity gated), S2 (un-gated)
 
| /data/mott/Scalers_%d.dat
 
| Delayed nT_Settle
 
 
|-
 
|-
 
| '''Mott_Sample'''
 
| '''Mott_Sample'''
| Mott FADC (Mode 1), S1, S2, TDC
+
| Mott FADC and INT FADC
 
| /data/mott/Mott_Sample_%d.dat
 
| /data/mott/Mott_Sample_%d.dat
 
| Mott Detector
 
| Mott Detector
 
|-
 
|-
 
| '''Mott_SemiInt'''
 
| '''Mott_SemiInt'''
| Mott FADC (Mode 7), S1, S2, TDC
+
| Mott FADC and INT FADC
 
| /data/mott/Mott_SemiInt_%d.dat
 
| /data/mott/Mott_SemiInt_%d.dat
 
| Mott Detector
 
| Mott Detector
 
|-
 
|-
| '''PEPPo_Int'''
+
| '''Mott_Int'''
| INT FADC, S1, S2
+
| INT FADC
| /data/compton/PEPPo_Int_%d.dat
+
| /data/mott/Mott_Int_%d.dat
 
| nT_Settle
 
| nT_Settle
 
|}
 
|}
Line 125: Line 111:
 
=='''Mott FADC'''==
 
=='''Mott FADC'''==
  
  const FADC_ADDR      = 0x680000  # 12 bit fADC MOTT - Slot 7
+
The parameters below have been optimized (July 3, 2022).
  const FADCMODE        = 1 (Mott_Sample)
 
  const FADCMODE        = 7 (Mott_SemiInt)
 
  const FADCSLOT_Mott  = 7
 
  const TRSPLIT        = 0xeb13  # Address of fADC Signal Distribution Module
 
  
   CH1 - E LEFT    Range - 0.5 V DAC_offset = 3300
+
<pre>
   CH2 - E RIGHT         - 0.5 V DAC_offset = 3300
+
   {
   CH3 - E UP            - 0.5 V DAC_offset = 3300
+
    type = "counting";
   CH4 - E DOWN           - 0.5 V DAC_offset = 3300
+
    address = 0xed0000;
   CH5 - dE LEFT          - 0.5 V DAC_offset = 3300
+
    slot = 13;
   CH6 - dE RIGHT        - 0.5 V DAC_offset = 3300
+
    sd_fp_address = 0xea00;
   CH7 - dE UP            - 0.5 V DAC_offset = 3300
+
 
   CH8 - dE DOWN          - 0.5 V DAC_offset = 3300
+
    init_arg = 0x13;
   CH9 - BFM              - 1.0 V DAC_offset = 3300
+
    mode = 1;
   CH10 - Empty          - 1.0 V DAC_offset = 3300
+
 
   CH11 - Mott Trigger   - 1.0 V DAC_offset = 3300
+
    pl = 260;
   CH12 - Empty          - 1.0 V DAC_offset = 3300
+
    ptw = 500;
   CH13 - Delayed Hel    - 1.0 V DAC_offset = 3300
+
    nsb = 5;
   CH14 - T_Settle       - 1.0 V DAC_offset = 3300
+
    nsa = 28;
   CH15 - Pat Sync       - 1.0 V DAC_offset = 3300
+
    np = 1;
  CH16 - Pair Sync       - 1.0 V DAC_offset = 3300
+
 
 +
    delay8 = 0;
 +
    delay9 = 2;
 +
    delay11 = 4;
 +
 
 +
    threshold =
 +
      [
 +
      10,      // CH1 - E LEFT
 +
      10,      // CH2 - E RIGHT
 +
      10,      // CH3 - T LEFT
 +
      10,      // CH4 - T RIGHT
 +
      10,      // CH5 -
 +
      10,      // CH6 -
 +
      10,      // CH7 -
 +
      10,      // CH8 -
 +
      10,      // CH9 -
 +
      10,      // CH10 -
 +
      10,      // CH11 - Mott Trigger
 +
      10,      // CH12 -
 +
      10,      // CH13 - Delayed Helicity
 +
      10,      // CH14 - T_Settle
 +
      10,      // CH15 - Pat Sync
 +
      10      // CH16 - Pair Sync
 +
      ];
 +
 
 +
     dac =
 +
      [
 +
      3050,  // CH1 - E LEFT      Range - 1.0 V
 +
      3050,   // CH2 - E RIGHT           - 1.0 V
 +
      3300,   // CH3 - T LEFT            - 1.0 V
 +
      3300,   // CH4 - T RIGHT           - 1.0 V
 +
      3300,   // CH5 -                   - 1.0 V
 +
      3300,   // CH6 -                   - 1.0 V
 +
      3300,   // CH7 -                   - 1.0 V
 +
      3300,   // CH8 -                   - 1.0 V
 +
      3300,   // CH9 -                   - 1.0 V
 +
      3300,   // CH10 -                 - 1.0 V
 +
      3300,   // CH11 - Mott Trigger     - 1.0 V
 +
      3300,   // CH12 -                 - 1.0 V
 +
      3300,   // CH13 - Delayed Helicity - 1.0 V
 +
      3300,   // CH14 - T_Settle         - 1.0 V
 +
      3300,   // CH15 - Pat Sync         - 1.0 V
 +
      3300   // CH16 - Pair Sync       - 1.0 V
 +
      ];
 +
  }
 +
</pre>
  
 
* Reference: JLab Module Manuals [https://coda.jlab.org/drupal/content/othermisc-modules]
 
* Reference: JLab Module Manuals [https://coda.jlab.org/drupal/content/othermisc-modules]
Line 156: Line 183:
 
* Summary of FADC250 Operating Modes (2/18/14): [[Media:FADC250_modes_2.pdf]]
 
* Summary of FADC250 Operating Modes (2/18/14): [[Media:FADC250_modes_2.pdf]]
  
* Changed Mott_SemiInt to the '''FADC Mode 7''' from Mode 3 -- Done on April 29, 2014. This mode provides:
+
* Mott_SemiInt uses '''FADC Mode 7''' This mode provides:
 
# Pulse integral (sum of all 4ns samples over set threshold, up to 3 pulses per window)
 
# Pulse integral (sum of all 4ns samples over set threshold, up to 3 pulses per window)
 
# Pulse time (62.5 ps resolution)
 
# Pulse time (62.5 ps resolution)
 
# Pedestal average of 4 samples at beginning of window.
 
# Pedestal average of 4 samples at beginning of window.
  
'''FADC Programmed Thresholds:'''
+
=='''INT FADC'''==
# Mott_Sample: Threshold = 0
+
 
# Mott_SemiInt:
+
The parameters below have been optimized (July 3, 2022)
  CH1 - E LEFT            Threshold = 600
 
  CH2 - E RIGHT          Threshold = 600
 
  CH3 - E UP              Threshold = 600
 
  CH4 - E DOWN            Threshold = 600
 
  CH5 - dE LEFT          Threshold = 600
 
  CH6 - dE RIGHT          Threshold = 600
 
  CH7 - dE UP            Threshold = 600
 
  CH8 - dE DOWN          Threshold = 600
 
  CH9 - BFM              Threshold = 1750
 
  CH10 - Empty            Threshold = 100
 
  CH11 - Mott Trigger    Threshold = 1000
 
  CH12 - Empty            Threshold = 100
 
  CH13 - Delayed Hel      Threshold = 10
 
  CH14 - T_Settle        Threshold = 10
 
  CH15 - Pat Sync        Threshold = 10
 
  CH16 - Pair Sync        Threshold = 10
 
  
'''Mott_Sample Settings:'''
+
<pre>
   FADC_BLOCK_MODE = 1
+
fadc250: (
  MODE            = 1
+
   {
  PL              = 80    - Programmable Latency (100 ns to 8 µs)
+
    type = "integrating";
  PTW            = 50    - Programmable Trigger Window (100 ns to 2 µs)
+
    address = 0xee0000;
 +
    slot = 18;
 +
    sd_fp_address = 0xeb00;
  
'''Mott_SemiInt Settings:'''
+
    init_arg = 0x13;
  FADC_BLOCK_MODE = 1
+
     mode = 1;
  MODE            = 7
 
  PL              = 80
 
  PTW            = 50
 
  NSB            = 5      - Number of Samples before the threshold crossing sample (TC) included in the pulse data set (integral)
 
  NSA            = 28     - Number of Samples after the threshold crossing sample (TC) included in the pulse data set (integral)
 
  NP              = 1     - Number of pulses to search for in PTW
 
  
 +
    pl = 0;
 +
    ptw = 0;
 +
    nsb = 1;
 +
    nsa = 498;
 +
    np = 1;
  
 +
    delay8 = 0;
 +
    delay9 = 0;
 +
    delay11 = 0;
  
=='''INT FADC'''==
+
    threshold =
 +
      [ 1, 1, 1, 1,
 +
1, 1, 1, 1,
 +
1, 1, 1, 1,
 +
1, 1, 1, 1 ];
 +
 
 +
    dac =
 +
      [ 3300, 3300, 3300, 3300,
 +
3300, 3300, 3300, 3300,
 +
3300, 3300, 3300, 3300,
 +
3300, 3300, 3300, 3300 ];
 +
 
 +
  },
 +
</pre>
  
  const FADC_ADDR      = 0xed0000  # 12 bit fADC Int - Slot 10       
 
  const FADCMODE        = 3 (Int_Int, special)
 
  const FADCSLOT_PEPPo3 = 10
 
  const TRSPLIT        = 0xea13  # Address of fADC Signal Distribution Module
 
  
  Range - 2.0 V  DAC_offset = 3300
 
  
 
Reference: [[Media:PEPPo-FADC.pdf]]
 
Reference: [[Media:PEPPo-FADC.pdf]]
Line 215: Line 238:
 
All the relevant files are at: '''M:\FE\PEPPo'''. These files also copied to opsmdaq0 at: '''/opt/idaq/HaiDong_PEPPo'''.
 
All the relevant files are at: '''M:\FE\PEPPo'''. These files also copied to opsmdaq0 at: '''/opt/idaq/HaiDong_PEPPo'''.
  
 +
=='''TI'''==
  
 +
  STATUS for TI at VME (Local) base address 0x00180000 (0x7fe83097d000)
 +
  --------------------------------------------------------------------------------
 +
  Firmware revision: 11.3 (tip113.svf)
  
 +
<pre>
 +
ti:
 +
{
 +
  blocklevel = 1;
 +
  bufferlevel = 10;
  
=='''TID'''==
+
  /*
 +
    Trigger Prescale := 1 / 2^(prescale)
 +
    prescale is fixed to 0 for Mott_Int
 +
  */
 +
  prescale = 0;
  
  A24 Address for TID Module (0x100000 for VME Slot 2)
+
trigger_rules: (
  const TRIG_ADDR      = 0x100000
+
  { /* rule 1 */
 +
    period = 10;
 +
    timestep = 0;
 +
  },
 +
  { /* rule 2 */
 +
    period = 10;
 +
    timestep = 0;
 +
  },
 +
  { /* rule 3 */
 +
    period = 1;
 +
    timestep = 0;
 +
  },
 +
  { /* rule 4 */
 +
    period = 1;
 +
    timestep = 0;
 +
  }
 +
  );
 +
</pre>
  
Reference: [[Media:TImaster.pdf]]
+
<pre>
 +
random_pulser:
 +
  {
 +
    enabled = 0;
 +
    prescale = 0xF;
 +
  }
  
 +
fixed_pulser:
 +
  {
 +
    enabled = 0;
 +
    nevents = 0xffff;
 +
    period = 1;
 +
    timestep = 1;
 +
  }
 +
}
 +
</pre>
  
 +
Reference: [[Media:TImaster.pdf]]
  
 
=='''Trigger Prescale'''==
 
=='''Trigger Prescale'''==
  
The input trigger can be prescaled by editing the crl file:
+
The input trigger can be prescaled by the ti:prescale parameter in the [[How to run UITF Mott CODA#Configuration File|Configuration File]]
   /* Front panel trigger prescale: 2^<arg> */
+
 
   tidSetPrescale(0);  
+
   /*
 +
    Trigger Prescale := 1 / 2^(prescale)
 +
    prescale is fixed to 0 for Mott_Int
 +
  */
 +
   prescale = 0;
  
 +
=='''helicity decoder'''==
  
 +
<pre>
 +
helicity_decoder:
 +
{
 +
  enabled = 1;
 +
  address = 0xa80000;
 +
  slot = 21;
  
=='''cefdmp/xcefdmp'''==
+
  input_delay = 0x100; // 0x100 = 2048 ns (1 = 8 ns)
The event dump utility (cefdmp) can display, in a readable ASCII format, events from the data files.
+
  trigger_latency_delay = 0x40; // 0x40 = 512 ns (1 = 8ns)
  
==== Syntax ====
+
  use_internal_helicity = 0;
% cefdmp [filename] [-o object] [-t tag] [-u uniquetag] [-s start] [-e end] [-d dictionary] [-x]
 
% xcefdmp [same]
 
  
==== Options ====  
+
internal_helicity:
o specify the source object name (CODA component name)  
+
  {
t select specified tag number or name (full path in event structure)
+
    helicity_pattern = 2; // 2 = OCTET
u select specified unique tag, independent of location in the event
+
    window_delay = 10;
s number of first record in file to dump
+
    settle_time = 0x40; // 0x40 = 512 ns (1 = 8ns)
e number of last record in file to dump
+
    stable_time = 0x80; // 0x80 = 1024 ns (1 = 8ns)
d specify dictionary for obtaining tag names and titles
+
    seed = 0xabcdef01;
x hex dump of integers (default is decimal)
+
  }
 +
}
 +
</pre>
  
 +
=='''jeviodmp'''==
  
 +
The Java-based event display utility can be used to navigate through the data files.
  
[[Image:xcefdmp_screen1.jpg]]
+
jeviodmp
  
[[Image:xcefdmp_screen2.jpg]]
+
[[File:jeviodmp_Mott_Int_98.png]]
  
 +
=='''evio2xml'''==
  
 +
The event format utility (evio2xml) can display, in a readable XML format, events from the data files.
  
=='''cedit and dbedit'''==
+
evio2xml [-max max_event] [-pause] [-skip skip_event]
Use cedit and/or dbedit to modify CODA database.
+
          [-dict dictfilename] [-dtag dtag]
 +
          [-ev evtag] [-noev evtag] [-frag frag] [-nofrag frag] [-max_depth max_depth]
 +
          [-n8 n8] [-n16 n16] [-n32 n32] [-n64 n64]
 +
          [-verbose] [-brief] [-no_data] [-xtod] [-m main_tag] [-e event_tag]
 +
          [-indent indent_size] [-no_typename] [-maxbuf maxbuf] [-debug]
 +
          [-out outfilenema] [-gz] filename
  
 +
===Example===
  
[[Image:cedit_screen.jpg]]
+
evio2xml -verbose -pause -skip 4 -max 1 Mott_Int_98.dat.0
 +
 +
<!-- ===================== Buffer 5 contains 80 words (320 bytes) ===================== -->
 +
 +
  <!-- header words: 79, 0xff501001 -->
 +
  <event format="evio" count="5" content="bank" data_type="0x10" tag="65360" padding="0" num="1" length="79" ndata="78">
 +
 +
      <!-- header words: 11, 0xff212001 -->
 +
      <bank content="segment" data_type="0x20" tag="65313" padding="0" num="1" length="11" ndata="10">
 +
 +
        <!-- header word: 0x10a0004 -->
 +
        <uint64 data_type="0xa" tag="1" padding="0" length="4" ndata="2">
 +
            0x0000000000000002  0x000000002569e106 
 +
        </uint64>
 +
 +
        <!-- header word: 0x1850001 -->
 +
        <uint16 data_type="0x5" tag="1" padding="2" length="1" ndata="1">
 +
            0x0041 
 +
        </uint16>
 +
 +
        <!-- header word: 0x1010002 -->
 +
        <uint32 data_type="0x1" tag="1" padding="0" length="2" ndata="2">
 +
            0x2569e106  0x91c00000 
 +
        </uint32>
 +
      </bank>
 +
 +
      <!-- header words: 65, 0x11001 -->
 +
      <bank content="bank" data_type="0x10" tag="1" padding="0" num="1" length="65" ndata="64">
 +
 +
        <!-- header words: 41, 0x2500101 -->
 +
        <uint32 data_type="0x1" tag="592" padding="0" num="1" length="41" ndata="40">
 +
            0x84800801  0x90000001  0x98000000  0x007dc31c 
 +
            0xa8000001  0x00c55a24  0xa8800001  0x0081114c 
 +
            0xa9000000  0x00d5191e  0xa9800000  0x00c2689c 
 +
            0xaa000000  0x00b89787  0xaa800000  0x00f7f107 
 +
            0xab000000  0x00b74fd4  0xab800000  0x00c81b0a 
 +
            0xac000000  0x00b03a79  0xac800000  0x00f879d1 
 +
            0xad000001  0x00262b4f  0xad800000  0x00c5c58c 
 +
            0xae000000  0x00df55a6  0xae80001b  0x00997dc0 
 +
            0xaf000000  0x00a14fe7  0xaf800000  0x009fbbf2 
 +
            0xf800ffff  0x8c800026  0xf8000000  0xf8000000 
 +
        </uint32>
 +
 +
        <!-- header words: 21, 0xdec0101 -->
 +
        <uint32 data_type="0x1" tag="3564" padding="0" num="1" length="21" ndata="20">
 +
            0x85740201  0x95400002  0x9af57dd3  0x00000012 
 +
            0xc000000e  0x00000004  0x000006ae  0x000006ae 
 +
            0x000001ac  0x00000358  0x00408643  0x0000f3f8 
 +
            0x003f924a  0x0000f423  0x00000031  0x77777777 
 +
            0x55555555  0x69699699  0x8ec71389  0x8d400014 
 +
        </uint32>
 +
      </bank>
 +
  </event>
 +
 +
  <!-- end buffer 5 -->
  
[[Image:dbedit_screen.jpg]]
+
=='''jcedit'''==
 +
Use the Java based CODA Configuration Editor jcedit to modify MOTT Configurations.
  
=='''Issues and FAQ'''==
+
[[File:jcedit_Mott_Int.png]]
* RunNumber: if the run number in msql is different from the one in CODA cool database, coda doesn't work. Open dbedit => localhost => sessions and change the RunNumber to match the one in CODA cool database.
 

Latest revision as of 19:39, 7 September 2023

OPS Network

Mott DAQ Host (Rack ITF 07, UITF Roof):

         name      =>  itfmdaq0 
         ip        =>  129.57.229.190

Mott DAQ SBC:

        name       =>  itfsbcmdaq0
        ip         =>  129.57.236.242 



UITF Mott DAQ itfsbcmdaq0

XVR-16 Abaco Intel/Linux VME SBC

Up to date version of JLab Module drivers

/home/idaq/linuxvme

CODA Readout lists

/home/idaq/rol

Configuration Files

/home/idaq/cfg

All UITF Mott CODA configurations:

  1. Mott_Sample
  2. Mott_Int

The source is available here:

 itfsbcmdaq0:/home/idaq/rol/

To compile, must be on itfsbcmdaq0. Use the Makefile:

 make

or specifically

 make uitf_list.so

To access the UITF Mott DAQ VME SBC:

 idaq@itfmdaq0 > ssh itfsbcmdaq0

CODA Files

CODA readout lists:

idaq@itfsbcmdaq0:/home/idaq/rol/
uitf_list.c

To compile:

 make uitf_list.so
  

Log entry scripts

 /opt/idaq/coda/logentry_scripts

CODA 3.10_devel

 /opt/idaq/coda/3.10_devel

CODA COOL_HOME

 /opt/idaq/coda/cool.itfmdaq0

CODA_SCRIPTS (for startCoda, kcoda, etc)

 /opt/idaq/coda/coda_scripts

Summary of CODA Configurations

Name Readout Output Trigger
Mott_Sample Mott FADC and INT FADC /data/mott/Mott_Sample_%d.dat Mott Detector
Mott_SemiInt Mott FADC and INT FADC /data/mott/Mott_SemiInt_%d.dat Mott Detector
Mott_Int INT FADC /data/mott/Mott_Int_%d.dat nT_Settle


Backup Data Files to SILO

Cron scripts are installed on the idaq account on opsmdaq0 to back up data and delete it from /data and /data1:

/opt/idaq/cron/cron_opsmdaq0

Do not attempted to copy, delete, move, or rename files. Never !

The scripts assume that data appears in /data*/DIR where DIR = "annihilation" or "compton" or "mott" Files must have the keywords "PEPPo" or "Scalers" or at least "dat". This avoids writing scratch files like root output. Do not start putting data in some new place or with new names. It won't be backed up to MSS if you do that.

The data are deleted from local disks if they have been written in duplicate with correct byte count to the MSS tape silo. The data stay on disk for an amount of time that is related to the amount of disk space is available. If lots of disk available, the data stay forever. If not much disk, the data are deleted aggressively.

 The data is copied to: /mss/accel/peppo/raw
The copying of data was disabled on January 3rd, 2014.
 - To list: crontab -l
 - To remove: crontab -r
 - Check again: crontab -l
 - To load: crontab cron_opsmdaq0 (in /opt/idaq/cron)


Mott FADC

The parameters below have been optimized (July 3, 2022).

  {
    type = "counting";
    address = 0xed0000;
    slot = 13;
    sd_fp_address = 0xea00;

    init_arg = 0x13;
    mode = 1;

    pl = 260;
    ptw = 500;
    nsb = 5;
    nsa = 28;
    np = 1;

    delay8 = 0;
    delay9 = 2;
    delay11 = 4;

    threshold =
      [
       10,      // CH1 - E LEFT
       10,      // CH2 - E RIGHT
       10,      // CH3 - T LEFT
       10,      // CH4 - T RIGHT
       10,      // CH5 - 
       10,      // CH6 - 
       10,      // CH7 - 
       10,      // CH8 - 
       10,      // CH9 -
       10,      // CH10 - 
       10,      // CH11 - Mott Trigger
       10,      // CH12 -
       10,      // CH13 - Delayed Helicity
       10,      // CH14 - T_Settle
       10,      // CH15 - Pat Sync
       10       // CH16 - Pair Sync
       ];

    dac =
      [
       3050,   // CH1 - E LEFT      Range - 1.0 V
       3050,   // CH2 - E RIGHT           - 1.0 V
       3300,   // CH3 - T LEFT            - 1.0 V
       3300,   // CH4 - T RIGHT           - 1.0 V
       3300,   // CH5 -                   - 1.0 V
       3300,   // CH6 -                   - 1.0 V
       3300,   // CH7 -                   - 1.0 V
       3300,   // CH8 -                   - 1.0 V
       3300,   // CH9 -                   - 1.0 V
       3300,   // CH10 -                  - 1.0 V
       3300,   // CH11 - Mott Trigger     - 1.0 V
       3300,   // CH12 -                  - 1.0 V
       3300,   // CH13 - Delayed Helicity - 1.0 V
       3300,   // CH14 - T_Settle         - 1.0 V
       3300,   // CH15 - Pat Sync         - 1.0 V
       3300    // CH16 - Pair Sync        - 1.0 V
       ]; 
  }
  • Reference: JLab Module Manuals [1]
  • Mott_SemiInt uses FADC Mode 7 This mode provides:
  1. Pulse integral (sum of all 4ns samples over set threshold, up to 3 pulses per window)
  2. Pulse time (62.5 ps resolution)
  3. Pedestal average of 4 samples at beginning of window.

INT FADC

The parameters below have been optimized (July 3, 2022)

fadc250: (
  {
    type = "integrating";
    address = 0xee0000;
    slot = 18;
    sd_fp_address = 0xeb00;

    init_arg = 0x13;
    mode = 1;

    pl = 0;
    ptw = 0;
    nsb = 1;
    nsa = 498;
    np = 1;

    delay8 = 0;
    delay9 = 0;
    delay11 = 0;

    threshold =
      [ 1, 1, 1, 1,
	1, 1, 1, 1,
	1, 1, 1, 1,
	1, 1, 1, 1 ];

    dac =
      [ 3300, 3300, 3300, 3300,
	3300, 3300, 3300, 3300,
	3300, 3300, 3300, 3300,
	3300, 3300, 3300, 3300 ];

  },


Reference: Media:PEPPo-FADC.pdf

Reference: Media:PEPPo_Helicity_Trigger_FADC250.docx

Reference: Media:PEPPpoHelicityFirmware.pdf Media:PEPPpoHelicityFirmware.docx

All the relevant files are at: M:\FE\PEPPo. These files also copied to opsmdaq0 at: /opt/idaq/HaiDong_PEPPo.

TI

 STATUS for TI at VME (Local) base address 0x00180000 (0x7fe83097d000) 
 --------------------------------------------------------------------------------
  Firmware revision: 11.3 (tip113.svf)
ti:
{
  blocklevel = 1;
  bufferlevel = 10;

  /*
     Trigger Prescale := 1 / 2^(prescale)
     prescale is fixed to 0 for Mott_Int
  */
  prescale = 0;

 trigger_rules: (
   { /* rule 1 */
     period = 10;
     timestep = 0;
   },
   { /* rule 2 */
     period = 10;
     timestep = 0;
   },
   { /* rule 3 */
     period = 1;
     timestep = 0;
   },
   { /* rule 4 */
     period = 1;
     timestep = 0;
   }
   );
 random_pulser:
  {
    enabled = 0;
    prescale = 0xF;
  }

 fixed_pulser:
  {
    enabled = 0;
    nevents = 0xffff;
    period = 1;
    timestep = 1;
  }
}

Reference: Media:TImaster.pdf

Trigger Prescale

The input trigger can be prescaled by the ti:prescale parameter in the Configuration File

 /*
    Trigger Prescale := 1 / 2^(prescale)
    prescale is fixed to 0 for Mott_Int
 */
 prescale = 0;

helicity decoder

helicity_decoder:
{
  enabled = 1; 
  address = 0xa80000;
  slot = 21;

  input_delay = 0x100; // 0x100 = 2048 ns (1 = 8 ns)
  trigger_latency_delay = 0x40; // 0x40 = 512 ns (1 = 8ns)

  use_internal_helicity = 0;

 internal_helicity:
  {
    helicity_pattern = 2; // 2 = OCTET
    window_delay = 10;
    settle_time = 0x40; // 0x40 = 512 ns (1 = 8ns)
    stable_time = 0x80; // 0x80 = 1024 ns (1 = 8ns)
    seed = 0xabcdef01;
  }
}

jeviodmp

The Java-based event display utility can be used to navigate through the data files.

jeviodmp

Jeviodmp Mott Int 98.png

evio2xml

The event format utility (evio2xml) can display, in a readable XML format, events from the data files.

evio2xml [-max max_event] [-pause] [-skip skip_event]
         [-dict dictfilename] [-dtag dtag]
         [-ev evtag] [-noev evtag] [-frag frag] [-nofrag frag] [-max_depth max_depth]
         [-n8 n8] [-n16 n16] [-n32 n32] [-n64 n64]
         [-verbose] [-brief] [-no_data] [-xtod] [-m main_tag] [-e event_tag]
         [-indent indent_size] [-no_typename] [-maxbuf maxbuf] [-debug]
         [-out outfilenema] [-gz] filename

Example

evio2xml -verbose -pause -skip 4 -max 1 Mott_Int_98.dat.0


  <event format="evio" count="5" content="bank" data_type="0x10" tag="65360" padding="0" num="1" length="79" ndata="78">

     <bank content="segment" data_type="0x20" tag="65313" padding="0" num="1" length="11" ndata="10">

        <uint64 data_type="0xa" tag="1" padding="0" length="4" ndata="2">
           0x0000000000000002  0x000000002569e106  
        </uint64>

        <uint16 data_type="0x5" tag="1" padding="2" length="1" ndata="1">
           0x0041  
        </uint16>

        <uint32 data_type="0x1" tag="1" padding="0" length="2" ndata="2">
           0x2569e106  0x91c00000  
        </uint32>
     </bank>

     <bank content="bank" data_type="0x10" tag="1" padding="0" num="1" length="65" ndata="64">

        <uint32 data_type="0x1" tag="592" padding="0" num="1" length="41" ndata="40">
           0x84800801  0x90000001  0x98000000  0x007dc31c  
           0xa8000001  0x00c55a24  0xa8800001  0x0081114c  
           0xa9000000  0x00d5191e  0xa9800000  0x00c2689c  
           0xaa000000  0x00b89787  0xaa800000  0x00f7f107  
           0xab000000  0x00b74fd4  0xab800000  0x00c81b0a  
           0xac000000  0x00b03a79  0xac800000  0x00f879d1  
           0xad000001  0x00262b4f  0xad800000  0x00c5c58c  
           0xae000000  0x00df55a6  0xae80001b  0x00997dc0  
           0xaf000000  0x00a14fe7  0xaf800000  0x009fbbf2  
           0xf800ffff  0x8c800026  0xf8000000  0xf8000000  
        </uint32>

        <uint32 data_type="0x1" tag="3564" padding="0" num="1" length="21" ndata="20">
           0x85740201  0x95400002  0x9af57dd3  0x00000012  
           0xc000000e  0x00000004  0x000006ae  0x000006ae  
           0x000001ac  0x00000358  0x00408643  0x0000f3f8  
           0x003f924a  0x0000f423  0x00000031  0x77777777  
           0x55555555  0x69699699  0x8ec71389  0x8d400014  
        </uint32>
     </bank>
  </event>

jcedit

Use the Java based CODA Configuration Editor jcedit to modify MOTT Configurations.

Jcedit Mott Int.png