General Meeting Summary 9/30/21
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PARTICIPANTS: Aaron Brown, Alexandre Camsonne, Arshak Asaturyan, Fernando Barbosa, Brad Sawatzky, Carlos Munoz-Camacho, Charles Hyde, Hamlet Mkrtchyan, Julie Roche, Marie Boer, Paulo Medeiros, Emmanuel Rindel, Rolf Ent, Stephen Wood, Vardan Tadevosyan, Vladimir Berdnikov, Tanja Horn
HV DIVIDERS (Fernando)
- Final tests performed, e.g. to check the baseline noise
- noise was dominantly from darkbox - will verify with additional tests on a different dard box, but no showstopper anticipated
- Next steps progress correlated with low voltage cabling - need to add a connector to PCB, so need final decisions on that
LOW VOLTAGE CABLE STRATEGY (IJCLab-Orsay Team)
LV CONNECTOR AND CABLING
- Several different options for cabling investigated and evaluated
- Final decision: Add additional connector to PCB and add flat cables
- Two options for the connector: pin (six pin) connector or surface mount - have identified a pin connector, but not surface mount
- Action items:
- review connectors and identify a surface mount connector, if none available proceed with the pin connector
- proceed with adding the connector to the PCB
ADDITIONAL GROUNDING
- Motivation for additional grounding: noise reduction
- Electrical grounding - already have good grounding between mu metal and PMT block
- Options for adding additional grounding between mu metal tube and aluminum block PMT support
- picoflex connector with pins (can be disconnected)
- solder pad (permanent)
- Discussion of the grounding connectors
- Pin solution may allow for making decision later if want to use additional grounding or not
- On the other hand, have to make decision before assembly anyway
- Global grounding already exists - or already being worked on
- isolate chassis from detector - i.e., overall grounded block
- PMT blocks are already well grounded
- internal to chassis: if good connection PMT and chassis then should be ok
- Action items:
- Prepare scheme of global grounding scheme, general ground and localized ground
MECHANICAL (Paulo)
- Cable layout design ongoing
DSG UPDATES (Aaron)
- Crystal thermal simulations
- No heat load applied - temperature along crystal very stable
- Applying 3.5 W heat source (18degC central crystal)
- most heat dissipated in first 2cm
- specifications on temperature stability and uniformity - overall stability is more important than uniformity, e.g., can tolerate few degree difference in temperature at end of crystal
- Action item:
- complete additional studies, e.g., scale up to full detector size
REFLECTOR PRE-SHAPING
- Reflector pre-shaping is taking place at two sites: ODU and JLab
- both sites use the same shaping tools
- Ovens and annealing procedure are slightly different
- Initial foils prepared at ODU seem consistent with those prepared at JLab, but need to verify
- JLab oven has been used by another group on 9/29 - need to check availability of oven
- Action items:
- ODU provide details of the annealing methods used for the initial foils for validation of the procedure
- Find out groups that use the JLab oven
NEXT MEETING: THURSDAY 28 OCTOBER AT 9AM ET