Difference between revisions of "EJFAT Group Meeting Dec. 15, 2022"
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(Created page with " The meeting time is 11:00am. === Connection Info: === <div class="toccolours mw-collapsible mw-collapsed"> You can connect using [https://jlab-org.zoomgov.com/j/1610125238?p...") |
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*** Demonstrate CP based flexibility/elasticity | *** Demonstrate CP based flexibility/elasticity | ||
** Paper for ACAT 2022 Conf Proc. (TBD) | ** Paper for ACAT 2022 Conf Proc. (TBD) | ||
+ | ** '''Indra-s3 issue''' | ||
* ESnet Update: | * ESnet Update: | ||
** '''New toolkit for detailed FPGA packet tracking''' | ** '''New toolkit for detailed FPGA packet tracking''' |
Latest revision as of 15:20, 15 December 2022
The meeting time is 11:00am.
Connection Info:
You can connect using ZoomGov Video conferencing (ID: 161 012 5238). (Click "Expand" to the right for details -->):
Meeting URL https://jlab-org.zoomgov.com/j/16184166709 Meeting ID 161 8416 6709 Passcode (none) Want to dial in from a phone? Dial one of the following numbers: US: +1 669 254 5252 or +1 646 828 7666 or +1 551 285 1373 or +1 669 216 1590 or 833 568 8864 (Toll Free) Enter the meeting ID and passcode followed by # Connecting from a room system? Dial: bjn.vc or 199.48.152.152 and enter your meeting ID & passcode
Agenda:
- Previous meeting
- Announcements:
- Status:
- Using ESnet FPGA f/w build 28 April
- Specs
- Jumbo Frames
- arp, ping, ICMP filtering
- Port entropy
- Script based LB Control Plane
- EJFAT VLAN Open for Business:
- Hosts running Ubuntu 20.04
- 1 Gbs i/f are: ejfat-1, ejfat-2, ejfat-3, ejfat-3, ejfat-5, ejfat-6, ejfat-fs
- 100 Gbs i/f are: ejfat-1-daq, ejfat-2-daq, ejfat-3-daq, ejfat-3-daq, ejfat-5-daq, ejfat-6-daq, ejfat-fs-daq
- LBs: ejfat-fs - ejfat-6 = 172.19.22.241-247, indra-s2 = 172.19.22.248
- FPGA LB Throughput - max sustained 90Gbs with s/w data generation
- RT 2022 Paper / IEEE-TNS - submitted August 22 - up to 8 mos. review process, 1st revision submitted 12/09/2022
- Using ESnet FPGA f/w build 28 April
- Current Activities
- Wrapping up EJFAT-I
- Test plan for all pieces required for integration test
- CLAS12 files -> Carl C++ Packetizer -> LB -> Carls's C++ Reassembler -> ERSAP
- Bug in LB DP - not forwarding packets of length < (18 bytes + LB Header size)
- Sending packets to indra-s3 NIC (129.57.109.232) but can't programitically read them
- Control Plane
- Compute Farm Feed Back Monitor
- Have working RL (Q-Learning) Schedule Density Adjuster (to be integrated)
- Implementing PID Controller
- Need to define Optimality Criterion for Schedule Density
- DP Supervisor
- Demonstrate CP based flexibility/elasticity
- Paper for ACAT 2022 Conf Proc. (TBD)
- Indra-s3 issue
- ESnet Update:
- New toolkit for detailed FPGA packet tracking
- Uses DPDK
- Can send packets via PCIe to FPGA
- Proposing special packet for CP event_id sync with sender - discuss with DAQ group
- IPV6 neighbor discovery - in process
- LB F/W Installation Manual - with PCI buffer allocation assurance steps
- In ESnet Legal Review
- Support C libraries for LB Host Control Plane - needs completion of C API doc
- Control Plane gRPC i/f to LB FPGA
- ESnet smartnic open-source GitHub repo - in legal review
- ESnet private, forkable Jlab P4 and simulations GitHub repo - in legal review
- New toolkit for detailed FPGA packet tracking
- AOT