Difference between revisions of "EJFAT"
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+ | <div class="orbitron"><font size="+3">Welcome to the EJFAT Wiki</font><br></div>('''E'''Snet / '''J'''LaB '''F'''PGA '''A'''ccelerated '''T'''ransport) | ||
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+ | <div class="orbitron"><font size="+1">System Overview:</font></div>''EJFAT is a collaboration between Energy Sciences Network (ESnet) and Thomas Jefferson National Laboratory (JLab) for proof of concept engineering to program a Field Programmable Gate Array (FPGA) for network data routing of commonly tagged UDP packets from any data source to individual and configurable destination endpoints in an end-point compute work load balanced manner, including some additional tagging for stream reassembly at the endpoint. The primary purpose of this FPGA based acceleration is to load balance work to destination compute farm endpoints with low latency and full line rate bandwidth of 100 Gbs with feedback from the destination compute farm. | ||
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== Presentations/Papers == | == Presentations/Papers == | ||
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Revision as of 21:18, 3 January 2022
(ESnet / JLaB FPGA Accelerated Transport)
EJFAT is a collaboration between Energy Sciences Network (ESnet) and Thomas Jefferson National Laboratory (JLab) for proof of concept engineering to program a Field Programmable Gate Array (FPGA) for network data routing of commonly tagged UDP packets from any data source to individual and configurable destination endpoints in an end-point compute work load balanced manner, including some additional tagging for stream reassembly at the endpoint. The primary purpose of this FPGA based acceleration is to load balance work to destination compute farm endpoints with low latency and full line rate bandwidth of 100 Gbs with feedback from the destination compute farm.
Presentations/Papers
date | presenter | Event | links |
---|---|---|---|
2021-03-01 | G. Heyes | EJFAT Proposal | Word |
2021-10-21 | M. S. Goodrich | Div Brief | |
2021-11-05 | M. S. Goodrich | Canisius College | |
2021-12-03 | S. Sheldon | ESnet LB Tutorial | MP4 |
2021-12-10 | Y. Kumar | SRO iX |
EJFAT Weekly Meetings
Technical Design Overview
EJFAT Technical Design Overview
Proposed Edge to Core Test Equipment:
PR408549 : Requisition 1 of 2 : Statement of Work for Servers
Requisition 2 of 2: Statement of Work for Switches & Cables