ML-FPGA R&D for EIC
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This is information related to beam tests done in support of the ML-FPGA R&D for EIC project.
Overview
The beam test will use a GEM detector and a small calorimeter behind one arm of the pair spectrometer in Hall-D. The setup will use two FPGA's, one for each detector, to process triggered data from the DAQ and send it into a JANA2 process. The downstream JANA2 process will run some algorithm on the data (proof-of-principle) and write the output to a file.
Phase 1:
- Single detector readout (calorimeter)
- CDAQ, no FPGA
- JANA2 JStreamingEventSource with direct reading of TCP socket
Phase 2:
- Single detector readout (calorimeter)
- CDAQ, with FPGA
- JANA2 JStreamingEventSource with direct reading of TCP socket
Phase 3:
- Two detector readout
- CDAQ, with FPGA
- JANA2 JStreamingEventSource with direct reading of TCP socket, simple event building
Phase 4:
- Two detector readout
- CDAQ, with FPGA
- ERSAP backend with event building
- JANA2 algorithm
- ERSAP Event Recorder