Difference between revisions of "Tritium DAQ page VMEaddresses"
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− | == VME addresses == | + | == VME addresses during Tritium Fall 2018 == |
+ | |||
+ | === Right HRS === | ||
+ | |||
+ | Configuration valid starting from run xxx (July 27, 2018): | ||
+ | |||
+ | {| border="1" | ||
+ | ! !!Number of modules!!Address 1st module!!Address increment!!Base Address | ||
+ | |- | ||
+ | | FADC || 7 || 0xB01000 || 0x001000 || 0x0A000000 | ||
+ | |- | ||
+ | | F1-TDC || 2 || 0x00B000 || 0x001000 || 0x08000000 | ||
+ | |- | ||
+ | | VETROC || 1 || 0x980000 (19<<19) || -- || 0x0D800000 | ||
+ | |- | ||
+ | | FADC-SDC || 1 || 0xEA || -- || -- | ||
+ | |- | ||
+ | | MLU || 1 || 0x0053 || -- || 0x00530000 | ||
+ | |} | ||
+ | |||
+ | * When adding more FADCs for the aerogel detector, double check for possible Base Address overlap. This may cause no visual error, but may increase the deadtime significantly due to bus error or even crash the VME crate. | ||
+ | |||
+ | === Left HRS === | ||
+ | |||
+ | Configuration valid starting from run xxx (July 27, 2018): | ||
+ | |||
+ | {| border="1" | ||
+ | ! !!Number of modules!!Address 1st module!!Address increment!!Base Address | ||
+ | |- | ||
+ | | FADC || 8 || 0xA80000 || 0x010000|| 0x0A000000 | ||
+ | |- | ||
+ | | F1-TDC || 2 || 0xFF3000 || 0x001000 || 0x08000000 | ||
+ | |- | ||
+ | | FADC-SDC || 1 || 0xEA || -- || -- | ||
+ | |- | ||
+ | | MLU || 1 || 0x0052 || -- || 0x00520000 | ||
+ | |} | ||
+ | |||
+ | == VME addresses during Tritium December 17/Spring 2018 == | ||
=== Right HRS === | === Right HRS === | ||
Line 13: | Line 51: | ||
|- | |- | ||
| VETROC || 1 || 0x980000 (19<<19) || -- || 0x0D8000000 | | VETROC || 1 || 0x980000 (19<<19) || -- || 0x0D8000000 | ||
+ | |- | ||
+ | | MLU || 1 || 0x0053 || -- || 0x00530000 | ||
|} | |} | ||
+ | |||
+ | * When adding more FADCs for the aerogel detector, double check for possible Base Address overlap. This may cause no visual error, but may increase the deadtime significantly due to bus error or even crash the VME crate. | ||
+ | * MLU was installed on 01/10/18 | ||
=== Left HRS === | === Left HRS === | ||
Line 25: | Line 68: | ||
|- | |- | ||
| F1-TDC || 2 || 0xFF3000 || 0x1000 || 0x08000000 | | F1-TDC || 2 || 0xFF3000 || 0x1000 || 0x08000000 | ||
+ | |- | ||
+ | | MLU || 1 || 0x0052 || -- || 0x00520000 | ||
|} | |} | ||
+ | |||
+ | * MLU was installed on 01/10/18 |
Latest revision as of 15:31, 30 November 2018
VME addresses during Tritium Fall 2018
Right HRS
Configuration valid starting from run xxx (July 27, 2018):
Number of modules | Address 1st module | Address increment | Base Address | |
---|---|---|---|---|
FADC | 7 | 0xB01000 | 0x001000 | 0x0A000000 |
F1-TDC | 2 | 0x00B000 | 0x001000 | 0x08000000 |
VETROC | 1 | 0x980000 (19<<19) | -- | 0x0D800000 |
FADC-SDC | 1 | 0xEA | -- | -- |
MLU | 1 | 0x0053 | -- | 0x00530000 |
- When adding more FADCs for the aerogel detector, double check for possible Base Address overlap. This may cause no visual error, but may increase the deadtime significantly due to bus error or even crash the VME crate.
Left HRS
Configuration valid starting from run xxx (July 27, 2018):
Number of modules | Address 1st module | Address increment | Base Address | |
---|---|---|---|---|
FADC | 8 | 0xA80000 | 0x010000 | 0x0A000000 |
F1-TDC | 2 | 0xFF3000 | 0x001000 | 0x08000000 |
FADC-SDC | 1 | 0xEA | -- | -- |
MLU | 1 | 0x0052 | -- | 0x00520000 |
VME addresses during Tritium December 17/Spring 2018
Right HRS
Configuration valid starting from run 90465 (December 5, 2017):
Number of modules | Address 1st module | Address increment | Base Address | |
---|---|---|---|---|
FADC | 4 | 0xB01000 | 0xEA00 | 0x0A000000 |
F1-TDC | 2 | 0xB000 | 0x1000 | 0x08000000 |
VETROC | 1 | 0x980000 (19<<19) | -- | 0x0D8000000 |
MLU | 1 | 0x0053 | -- | 0x00530000 |
- When adding more FADCs for the aerogel detector, double check for possible Base Address overlap. This may cause no visual error, but may increase the deadtime significantly due to bus error or even crash the VME crate.
- MLU was installed on 01/10/18
Left HRS
Configuration valid starting from run 675 (December 5, 2017):
Number of modules | Address 1st module | Address increment | Base Address | |
---|---|---|---|---|
FADC | 4 | 0xA80000 | 0xEA00 | 0x0A000000 |
F1-TDC | 2 | 0xFF3000 | 0x1000 | 0x08000000 |
MLU | 1 | 0x0052 | -- | 0x00520000 |
- MLU was installed on 01/10/18