Tritium DAQ page F1VETROCmap

Channel maps for F1TDCs and VETROC

Left HRS

Configuration valid starting from run 675 (December 5, 2017):

VME Slot	channel	Signal
14	0	S2L-1
:	:	:
14	15	S2L-16
14	16	CER-1
:	:	:
14	25	CER-10
14	26	GC SUM
14	27	S0A
14	28	S0B
14	29	S0coin
14	30	L1A
14	31	S2

VME Slot	channel	Signal
15	0	T1
15	1	T2
15	2	T3
15	3	(nothing)
15	4	EDTM
15	5	L1A_remote
15	6	clk RHS
15	7	clock
15	8	(nothing)
15	9	s0_or_s2 leftHRS
15	10	s2 left
15	11	s2B
15	12	s0_or_s2 rightHRS
15	13	all adc gate
15	14	L1A
15	15	RF signal
15	16	S2R-1
:	:	:
15	31	S2R-16

Right HRS

Configuration valid starting from run 90465 (December 5, 2017):

VME Slot	channel	Signal
8	0	T-1
8	1	T-2
8	2	T-3
8	3	T-4
8	4	T-5
8	5	T-6
8	6	RHRS clock
8	7	LHRS clock
8	8	L1A_R
8	9	RHRS clock
8	10	s2L
8	11	s2R
8	12	s0_or_S2
8	13	ADC gate
8	14	L1A
8	15	S2L-1
:	:	:
8	31	S2L-16

VME Slot	channel	Signal
10	0	GC-01
:	:	:
10	9	GC-10
10	10	GC-SUM
10	11	S0A
10	12	S0B
10	13	S0coin
10	14	RF time
10	15	S2coin
10	16	S2R-1
:	:	:
10	31	S2R-16