EJFAT Group Meeting Dec 19, 2024

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The meeting time is 11:00am Eastern/USA.

Connection Info:

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Meeting URL
 https://jlab-org.zoomgov.com/j/1611828967

Meeting ID
161 182 8967

Passcode
570041

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Agenda:

  1. Previous meeting
  2. Announcements:
    1. ACAT2024 Paper Accepted
    2. ESnet CONFAB event, which runs from April 7 to 11. 
      1. EJFAT developer meeting all day Thursday 10th
      2. April 10th 2025 in San Francisco
    3. SkuTech Interest in EJFAT
      1. JLab supplied Letter of Support for pre-proposal for SBIR Phase II
  3. Topics
    1. ALS: E2SAR integration
    2. IRI Test Development:
      1. Next Test Date/Time = ?????
      2. Data Source:
        1. JLAB, CLAS12, pre-triggered events - 1 channel
      3. Data Sink:
        1. Perlmutter - 80 nodes
        2. ORNL/ESnet/JLab IRI Testbed / Defiant - 4 nodes allocated
        3. JLab - 7 nodes available
        4. FABRIC - nodes available
        5. ERSAP
      4. Test Plans - JLab, ESnet, NERSC:
      5. E2SAR Integration
    3. JLab FEG/SRO
      1. will use interim UDP solution for event sync
      2. Special Events Issue - Completely Out-of-band
        1. Cloud Based message queue
        2. LB isolation from any non-LB processing
        3. Cloud solutions include Kafka and RabbitMQ, ...
    4. E2SAR 0.1.4
      1. segmentation/reassembly complete
      2. .deb packages for Ubuntu 20, 22 and 24
    5. Experiment Halls - beam returns late January/February 2025
    6. Ubuntu 20.04 LTS - support ends in 2025 - next ESnet target 22.04
    7. IB
  4. Status
    1. ejfat-1 - 2-port LAG at switch
    2. ejfat-2
      1. Currently shadowing ESnet Stable deployment for IRI
    3. ejfat-3
      1. two FPGA DP built
      2. FW containers built Stacey
      3. Needs Installation Procedure
      4. 4-port LAG at switch
      5. needs CP installation
    4. ejfat-6
      1. Ubuntu 24.04 installed
      2. esnet-smartnic-fw build succeeds with podman
      3. issues with podman compose
  5. EJFAT Phase II
    1. Architecture change in control/data paths for FPGA (SRIOV)
    2. PCIE Virtual Functions
    3. Adding PCIE ACS
    4. ESnet interested in partnering for beachhead in FPGA/GPU AI space
      1. Separate Project
      2. FAST program coming up
      3. May get free help from Xilinx
      4. Might target VERSA release
  6. AOT

Notes

  1. LLDP needs IOMMU
  2. EJFAT nodes:
    1. 16 NUMA domains
    2. DPDK must run portmode driver on CPU in NUMA domain of FPGA for LLDP messages

Minutes

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